Altera / Intel Arria® V Midrange FPGAs
Altera / Intel® Arria® V Midrange FPGAs consist of a comprehensive offering of mid-range FPGAs ranging from low-power 6Gbps and 10Gbps applications to high mid-range FPGA bandwidth 12.5Gbps transceivers. The Altera / Intel® Arria® V devices are ideal for power-sensitive wireless infrastructure equipment, 20G/40G bridging, switching, and packet processing applications, high-definition video processing and image manipulation, and intensive digital signal processing (DSP) applications.
FEATURES
- Two variants:
- Arria® V GT FPGAs offer low power mid-range FPGA for applications that require up to 20 transceivers at 10.3125Gbps and SFF 8431 compliance
- Arria® V GX FPGAs offer low power mid-range FPGA for applications that require up to 32 backplane-capable 6.5536Gbps transceivers
- Low static power
- Improved logic integration and differentiation capabilities
- Increased bandwidth capacity
- Hard-processor system (HPS) with integrated Arm® Cortex®-A9 MPCore processor
- Internal memory blocks
- M10K-10Kb memory blocks with soft error correction code (ECC)
- M20K-20Kb memory blocks with hard ECC (Arria V GZ devices only)
- Memory logic array block (MLAB)—640-bit distributed LUTRAM where you can use up to 50% of the ALMs as MLAB memory
APPLICATIONS
- Lowest total power for mid-range applications in:
- Remote radio units
- 10G / 40G line cards
- Broadcast studio equipment
- Embedded hard IP blocks
- Low system cost
- TSMC's 28nm process technology
- Thermal composite flip-chip BGA packaging
- High-performance FPGA fabric
- Clock networks
- Up to 650MHz global clock network
- Global, quadrant, and peripheral clock networks
- Clock networks that are not used can be powered down to reduce dynamic power
- Phase-locked loops (PLLs)
- FPGA general-purpose I/Os (GPIOs)
- External memory interface
- Memory interfaces with low latency (low-power high-speed serial interface)
